The present invention relates to methods for fabricating a semiconductor device having an insulating film of high dielectric such as hafnium oxide (HfO2) or zirconium oxide (ZrO2).
In recent years, further miniaturization of a MIS transistor has reduced the thickness of a gate insulating film provided in the transistor, which has offered the transistor with high driving power. The thinned gate insulating film, however, causes a direct tunnel current flow between a gate and a channel and an increase in the direct tunnel current boosts the power consumption of the transistor.
Generally, a fine MOS integrated circuit having a gate length of 0.10 μm or smaller requires a very thin gate insulating film whose equivalent silicon oxide thickness Eot is 2 nm or smaller. The equivalent silicon oxide thickness refers to the thickness of an insulating film necessary for having capacitance equivalent to that of a silicon oxide film. In the case where silicon oxide (SiO2) is used for the insulating film, when the thickness thereof is reduced to 2 nm or smaller, tunnel current becomes predominant. Probably, an insulating film of silicon oxide having a thickness of 1.2 nm or smaller cannot be used in a practicable element.
To realize both high driving power and low power consumption, a high dielectric constant insulating film having a higher dielectric constant than silicon oxide is being employed as the gate insulating film.
In capacitors included in, for example, an embedded LSI in which a DRAM portion and a logic portion are embedded within one chip, a capacitor insulating film is conventionally made of silicon oxide. Like the MIS transistor, as the capacitor insulating film is thinned, tunnel current increases. As a result, the charge holding time of the capacitor may be shortened. To solve this problem, consideration is being made of the use of a high dielectric constant material in the capacitor insulating film of this capacitor.
For example, a high dielectric thin film of metal oxide containing hafnium (Hf) or zirconium (Zn) is generally formed by a film growth technique such as sputtering, metal organic chemical vapor deposition (MOCVD), atomic layer chemical vapor deposition (ALCVD), or molecular beam epitaxy (MBE).
When a transistor is formed by a series of process steps of depositing a gate insulating film of high dielectric, forming a gate electrode, and forming a dopant junction in a source and a drain, that is to say, by a self alignment process, it is necessary to perform, after the dopant introduction into the source and drain, heat treatment for heating the introduction regions to about 900° C. in order to form dopant junctions causing small leakage current.
Instead of the self alignment process, a so-called replacement process in which source and drain areas are formed prior to the formation of a gate insulating film is assumed to be applied. Even in the case of the replacement process, other than an MBE technique in which a high dielectric thin film is epitaxially grown in ultrahigh vacuum, it is essential for any film growth technique to perform heat treatment at 700° C. or higher in order to provide a gate insulating film of good insulation properties (See, e.g., Shigenori Hayashi, et al., “Fabrication and Evaluation of High Dielectric Constant Gate Insulating Film by Reactive Sputtering” The 60th Symposium on Semiconductors and Integrated Circuits Technology, Electronic Material Committee in the Electrochemical Society of Japan (June, 2001) pp. 12-16).
Heat treatment at high temperatures, however, causes silicidation reaction by the reaction of metal with silicon or crystallization by an oxide, and thus a boundary is formed between the regions where the composition of the film is changed and not changed. This decreases the insulation properties of the film (See, e.g., Noriyuki Miyata, et al., “Thermal Stability of HfO2/Ultrathin-SiO2/Si structures” Extended Abstracts of the 2002 International Conference on Solid State Devices and Materials, Nagoya (2002) pp. 478-479).
In general, when these high dielectric materials are subjected to heat treatment at 600° C. or higher, however, they react with silicon constituting a substrate or they suffer from grain boundaries by the crystallization of themselves and film thickness ununiformity by their phase change. This increases leakage current and decreases breakdown voltage.
Moreover, by traces of oxygen contained in the atmosphere used during the heat treatment and oxygen contained in a silicon substrate and an insulating film, a silicon oxide film or a compound film made by the reaction of high dielectric with silicon (a so-called silicate thin film) is formed at the interface between the high dielectric film and the silicon substrate. The dielectric constants of the silicon oxide film and the silicate thin film range from a half to a smaller fraction of that of the high dielectric material, so that the formation of these films corresponds to the insertion of a capacitor in series with the high dielectric film. Accordingly, the effective dielectric constant thereof decreases.
As is apparent from the above, improvement of the heat treatment technique is essential to formation of a gate insulating film of high dielectric suitable for practical use.
Also in the case where the high dielectric materials are used for a capacitor insulating film of a capacitor, the same problems arise. To be more specific, when a silicon substrate is used for one electrode of the capacitor, an oxide film of low dielectric constant tends to be formed at the interface between the insulating film and the silicon substrate as in the case of the gate insulating film.
For a capacitor formed in a sandwich structure in which metal electrodes vertically sandwich an insulating film of high dielectric, or in a so-called MIM structure, how the reaction of the high dielectric film with the underlying and overlying metal electrodes is minimized becomes a big problem.